參數(shù)資料
型號: MC74HCT259ADR2G
廠商: ON Semiconductor
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: 8-BIT ADDRESSABLE LATCH
標準包裝: 2,500
系列: 74HCT
邏輯類型: D 型,可尋址
電路: 1:8
輸出類型: 標準
電源電壓: 4.5 V ~ 5.5 V
獨立電路: 1
延遲時間 - 傳輸: 42ns
輸出電流高,低: 5.2mA,5.2mA
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2011
April, 2011 Rev. 3
1
Publication Order Number:
MC74HCT259A/D
MC74HCT259A
8-Bit Addressable Latch
1-of-8 Decoder with LSTTL
Inputs
HighPerformance SiliconGate CMOS
The MC74HCT259A is identical in pinout to the LS259. The device
inputs are compatible with standard CMOS and LSTTL outputs.
The HCT259A has four modes of operation as shown in the mode
selection table. In the addressable latch mode, the data on Data In is
written into the addressed latch. The addressed latch follows the data
input with all nonaddressed latches remaining in their previous
states. In the memory mode, all latches remain in their previous state
and are unaffected by the Data or Address inputs. In the oneofeight
decoding or demultiplexing mode, the addressed output follows the
state of Data In with all other outputs in the LOW state. In the Reset
mode all outputs are LOW and unaffected by the address and data
inputs. When operating the HCT259A as an addressable latch,
changing more than one bit of the address could impose a transient
wrong address. Therefore, this should only be done while in the
memory mode.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
These are PbFree Devices
http://onsemi.com
MARKING
DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
1
16
HCT259AG
AWLYWW
HCT
259A
ALYWG
G
1
16
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
PIN ASSIGNMENT
1
16
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Q7
DATA IN
ENABLE
RESET
VCC
Q4
Q5
Q6
Q0
A2
A1
A0
GND
Q3
Q2
Q1
MODE SELECTION TABLE
Enable
Reset
Mode
L
H
Addressable Latch
H
Memory
LL
8Line Demultiplexer
H
L
Reset
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