參數(shù)資料
型號(hào): MC74HC597AD
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch
中文描述: HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
封裝: 0.150 INCH, PLASTIC, SOIC-16
文件頁(yè)數(shù): 5/11頁(yè)
文件大?。?/td> 291K
代理商: MC74HC597AD
MC54/74HC597A
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
(Figure 5)
3.0
40
50
(Figure 6)
3.0
40
45
50
Minimum Setup Time, Serial Shift/Parallel Load to Shift Clock
(Figure 7)
2.0
3.0
6.0
70
40
13
45
90
50
20
ns
Minimum Hold Time, Latch Clock to Parallel Data Inputs A–H
2.0
6.0
15
2
80
45
16
30
ns
2.0
6.0
2
2
20
3
4
ns
trec
Minimum Recovery Time, Reset Inactive to Shift Clock
2.0
6.0
70
13
2
2
90
20
2
2
ns
tw
Minimum Pulse Width, Latch Clock and Shift Clock
2.0
6.0
60
10
80
16
80
16
ns
tw
Minimum Pulse Width, Reset
2.0
4.5
6.0
60
12
10
70
13
80
19
16
ns
tw
Minimum Pulse Width, Serial Shift/Parallel Load
2.0
4.5
60
12
70
15
13
80
19
ns
4.5
500
500
70
15
500
相關(guān)PDF資料
PDF描述
MC74HC597 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch
MC74HC597ADT 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch
MC74HC597AN 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch
MC74HC597D 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch
MC74HC597N 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch
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