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參數(shù)資料
| 型號(hào)： | MC74HC4316N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Dual Timer; Package: SOP; No of Pins: 14; Container: Rail |
| 中文描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 347K |
| 代理商： | MC74HC4316N |
MC74HC4316
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
VIS = VCC to VEE
4 5
0.0
210
230
250
VIS = VCC or VEE (Endpoints)
4.5
0.0
100
110
130
Maximum Difference in “ON”
Resistance Between Any Two
VIS = 1/2 (VCC – VEE)
2.0
4.5
6.0
0.0
0.0
– 6.0
—
20
10
—
30
20
—
40
25
Maximum Off–Channel Leakage
6.0
– 6.0
0.1
0.5
1.0
Current, Any One Channel
VIS = VCC or VEE
μ
A
operation, it is recommended that these devices only be used to control digital signals.
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
tPHL
(Figures 8 and 9)
4.5
10
18
6.0
43
15
64
tPZL,
Maximum Propagation Delay, Control or Enable to Analog Output
2.0
185
220
54
265
ns
and Enable Inputs
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Control Input = GND
CPD
Power Dissipation Capacitance (Per Switch) (Figure 13)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
15
pF
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