參數(shù)資料
型號: MC74HC4060ADTG
廠商: ON Semiconductor
文件頁數(shù): 10/13頁
文件大小: 0K
描述: IC COUNTER 14STAGE BIN 16-TSSOP
標(biāo)準(zhǔn)包裝: 96
系列: 74HC
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 14
復(fù)位: 異步
計(jì)數(shù)速率: 50MHz
觸發(fā)器類型: 負(fù)邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
其它名稱: MC74HC4060ADTG-ND
MC74HC4060ADTGOS
MC74HC4060A
http://onsemi.com
6
PIN DESCRIPTIONS
INPUTS
Osc In (Pin 11)
Negativeedge triggering clock input. A hightolow
transition on this input advances the state of the counter. Osc
In may be driven by an external clock source.
Reset (Pin 12)
Activehigh reset. A high level applied to this input
asynchronously resets the counter to its zero state (forcing
all Q outputs low) and disables the oscillator.
OUTPUTS
Q4—Q10, Q12Q14 (Pins 7, 5, 4, 6, 13, 15, 1, 2, 3)
Activehigh outputs. Each Qn output divides the Clock
input frequency by 2N. The user should note the Q1, Q2, Q3
and Q11 are not available as outputs.
Osc Out 1, Osc Out 2 (Pins 9, 10)
Oscillator outputs. These pins are used in conjunction
with Osc In and the external components to form an
oscillator. When Osc In is being driven with an external
clock source, Osc Out 1 and Osc Out 2 must be left open
circuited. With the crystal oscillator configuration in Figure
6, Osc Out 2 must be left open circuited.
SWITCHING WAVEFORMS
tw
tf
Osc In
Q
VCC
GND
90%
50%
10%
tr
tw
90%
50%
10%
tPHL
1/fMAX
tPLH
tTLH
tTHL
Reset
VCC
GND
tPHL
50%
Figure 1.
Figure 2.
Q
VCC
GND
50%
Osc In
50%
trec
50%
Qn
VCC
GND
50%
Qn+1
CL*
*Includes all probe and jig capacitance
TEST
POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3.
Figure 4. Test Circuit
tPLH
tPHL
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