參數(shù)資料
型號: MC74HC393ADR2G
廠商: ON Semiconductor
文件頁數(shù): 1/11頁
文件大?。?/td> 0K
描述: IC COUNTER DUAL 4STAGE 14SOIC
標準包裝: 2,500
系列: 74HC
邏輯類型: 二進制計數(shù)器
方向:
元件數(shù): 2
每個元件的位元數(shù): 4
復位: 異步
計數(shù)速率: 50MHz
觸發(fā)器類型: 負邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 14-SOICN
包裝: 帶卷 (TR)
其它名稱: MC74HC393ADR2GOS
MC74HC393ADR2GOS-ND
MC74HC393ADR2GOSTR
Semiconductor Components Industries, LLC, 2012
June, 2012 Rev. 6
1
Publication Order Number:
MC74HC393A/D
MC74HC393A
Dual 4-Stage Binary Ripple
Counter
HighPerformance SiliconGate CMOS
The MC74HC393A is identical in pinout to the LS393. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device consists of two independent 4bit binary ripple counters
with parallel outputs from each counter stage. A
÷ 256 counter can be
obtained by cascading the two binary counters.
Internal flipflops are triggered by hightolow transitions of the
clock input. Reset for the counters is asynchronous and activehigh.
State changes of the Q outputs do not occur simultaneously because of
internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and should not be used as clocks or as strobes except
when gated with the Clock of the HC393A.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the JEDEC Standard No. 7 A Requirements
Chip Complexity: 236 FETs or 59 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree, Halogen Free and are RoHS Compliant
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G
= PbFree Package
TSSOP14
DT SUFFIX
CASE 948G
14
1
SOIC14
D SUFFIX
CASE 751A
14
1
HC393AG
AWLYWW
1
14
HC
393A
ALYWG
G
1
14
1
PDIP14
N SUFFIX
CASE 646
MC74HC393AN
AWLYYWWG
1
14
(Note: Microdot may be in either location)
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