參數(shù)資料
型號(hào): MC74HC390DR2
廠商: ON SEMICONDUCTOR
元件分類: 計(jì)數(shù)器
英文描述: HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDSO16
封裝: PLASTIC, SOIC-16
文件頁(yè)數(shù): 4/9頁(yè)
文件大?。?/td> 223K
代理商: MC74HC390DR2
MC74HC390
http://onsemi.com
4
PIN DESCRIPTIONS
INPUTS
Clock A (Pins 1, 15) and Clock B (Pins 4, 15)
Clock A is the clock input to the ÷ 2 counter; Clock B is
the clock input to the ÷ 5 counter. The internal flipflops are
toggled by hightolow transitions of the clock input.
CONTROL INPUTS
Reset (Pins 2, 14)
Asynchronous reset. A high at the Reset input prevents
counting, resets the internal flipflops, and forces QA
through QD low.
OUTPUTS
QA (Pins 3, 13)
Output of the ÷ 2 counter.
QB, QC, QD (Pins 5, 6, 7, 9, 10, 11)
Outputs of the ÷ 5 counter. QD is the most significant bit.
QA is the least significant bit when the counter is connected
for BCD output as in Figure 4. QB is the least significant bit
when the counter is operating in the biquinary mode as in
Figure 5.
SWITCHING WAVEFORMS
Q
tr
tf
tPLH
tPHL
tTLH
tTHL
VCC
GND
CLOCK
10%
50%
90%
1/fmax
tw
trec
RESET
Figure 1.
Figure 2.
VCC
GND
VCC
GND
10%
50%
90%
Q
CLOCK
50%
tPHL
tw
10%
TEST CIRCUIT
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3.
相關(guān)PDF資料
PDF描述
MC74HC393ADTR2 HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14
MC74HC393DR2 HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14
MC74HC4017DDR2 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 10-BIT UP RING COUNTER, PDSO16
MC54HC4017JD HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 10-BIT UP RING COUNTER, CDIP16
MC74HC4020N HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, PDIP16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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