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參數(shù)資料
| 型號： | MC74HC367N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | HC/UH SERIES, 6-BIT DRIVER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 161K |
| 代理商： | MC74HC367N |
MC54/74HC367
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
tPHL
(Figures 1 and 3)
4.5
24
36
6.0
30
30
45
tPZL,
Maximum Propagation Delay, Output Enable to Output Y
2.0
190
240
37
285
ns
tTHL
(Figures 1 and 3)
4.5
12
18
15
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
CPD
Power Dissipation Capacitance (Per Buffer)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
40
pF
SWITCHING WAVEFORMS
VCC
GND
tf
tr
INPUT A
OUTPUT Y
10%
90%
10%
90%
tTLH
tPLH
tPHL
tTHL
OUTPUT ENABLE
OUTPUT Y
OUTPUT Y
50%
50%
50%
90%
10%
tPZL
tPLZ
tPZH
tPHZ
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
Figure 1.
Figure 2.
TEST CIRCUITS
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
1 k
Figure 3.
Figure 4.
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