參數(shù)資料
型號(hào): MC74HC367ADT
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: NPN Epitaxial Silicon Transistor
中文描述: HC/UH SERIES, 6-BIT DRIVER, TRUE OUTPUT, PDSO16
封裝: PLASTIC, TSSOP-16
文件頁數(shù): 3/6頁
文件大?。?/td> 155K
代理商: MC74HC367ADT
MC74HC367A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
0.1
|Iout|
20
μ
A
Voltage
0.1
4.5
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Vout = VCC or GND
0.26
±
0.1
0.1
Vin = VIL
|Iout|
|Iout|
|Iout|
6.0
±
0.5
0.33
0.40
Iin
IOZ
Maximum Three–State
Leakage Current
Maximum Input Leakage Current
Output in High–Impedance State
Vin = VIL or VIH
Vin = VCC or GND
6.0
±
1.0
±
1.0
μ
A
6.0
±
5.0
±
10
μ
A
Current (per Package)
Iout = 0
μ
A
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Symbol
b l
Parameter
V
25 C
20
26
U i
Cin
Maximum Input Capacitance
Cout
Maximum Three–State Output Capacitance
4.5
6.0
38
32
190
125 C
12
10
13
pF
Maximum Propagation Delay, Input A to Output Y
2.0
6.0
30
120
18
15
150
180
31
ns
Maximum Propagation Delay, Output Enable to Output Y
4.5
6.0
2.0
6.0
175
220
37
45
57
48
265
ns
tPZL,
Maximum Propagation Delay, Output Enable to Output Y
2.0
10
240
48
21
285
ns
tTLH,
Maximum Output Transition Time, Any Output
2.0
60
10
75
15
90
10
15
15
15
CPD
Power Dissipation Capacitance (Per Buffer)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
B ff )*
Typical @ 25
°
C, VCC = 5.0 V
35
pF
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