參數(shù)資料
型號: MC74HC366
廠商: Motorola, Inc.
英文描述: Hex 3-State Inverting Buffer with Common Enables
中文描述: 六角三態(tài)反相緩沖與普通啟用
文件頁數(shù): 1/5頁
文件大?。?/td> 163K
代理商: MC74HC366
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
& "" $ " #
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High–Performance Silicon–Gate CMOS
The MC54/74HC366 is identical in pinout to the LS366. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device is a high–speed hex buffer with 3–state outputs and two
common active–low Output Enables. When either of the enables is high, the
buffer outputs are placed into high–impedance states. The HC366 has
inverting outputs.
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 78 FETs or 19.5 Equivalent Gates
LOGIC DIAGRAM
A3
A4
A5
A0
A1
A2
2
4
6
10
12
14
OUTPUT ENABLE 1
1
15
PIN 16 = VCC
PIN 8 = GND
OUTPUT ENABLE 2
Y3
Y4
Y5
Y0
Y1
Y2
3
5
7
9
11
13
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
A4
Y5
A5
OUTPUT
ENABLE 2
VCC
Y3
A3
Y4
A1
Y0
A0
OUTPUT
ENABLE 1
GND
Y2
A2
Y1
FUNCTION TABLE
Inputs
Enable
2
Output
Enable
1
A
Y
L
L
H
X
L
L
X
H
L
H
X
X
H
L
Z
Z
X = don’t care
Z = high impedance
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
16
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
1
16
ORDERING INFORMATION
MC54HCXXXJ
MC74HCXXXN
Ceramic
Plastic
相關PDF資料
PDF描述
MC74HC366AD Hex 3-State Inverting Buffer with Common Enables
MC74HC366ADT Hex 3-State Inverting Buffer with Common Enables
MC74HC366AN Hex 3-State Inverting Buffer with Common Enables
MC74HC366N Hex 3-State Inverting Buffer with Common Enables
MC74HC367A Telecomm/Datacomm
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