參數(shù)資料
型號: MC74HC257
廠商: Motorola, Inc.
英文描述: 40 AMP MINI-ISO AUTOMOTIVE RELAY
中文描述: 四2輸入數(shù)據(jù)選擇器/多路與三態(tài)輸出
文件頁數(shù): 3/6頁
文件大?。?/td> 175K
代理商: MC74HC257
MC74HC257
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
tPHL
(Figures 1 and 4)
4.5
20
30
6.0
17
25
26
tPLZ,
Maximum Propagation Delay, Output Enable to Output Y
2.0
150
190
21
225
ns
tPZH
(Figures 3 and 5)
4.5
30
45
6.0
10
38
15
Cin
Cout
Maximum Input Capacitance
10
13
10
pF
Maximum Three–State Output Capacitance
15
10
15
pF
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
15
CPD
Power Dissipation Capacitance (Per Package)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
39
pF
PIN DESCRIPTIONS
INPUTS
A0, A1, A2, A3 (Pins 2, 5, 11, 14)
Nibble A input. The data present on these pins is trans-
ferred to the output when the Select input is at a low level and
the Output Enable input is at a low level. The data is pres-
ented to the outputs in noninverted form.
B0, B1, B2, B3 (Pins 3, 6, 10, 13)
Nibble B input. The logic data present on these pins is
transferred to the output when the Select input is at a high
level and the Output Enable input is at a low level. The data
is presented to the outputs in noninverted form.
OUTPUTS
Y0, Y1, Y2, Y3 (Pins 4, 7, 9, 12)
Nibble output. The selected nibble input is presented at
these outputs when the Output Enable input is at a low level.
For the Output Enable input at a high level, the outputs are
switched to the high impedance state.
CONTROL INPUTS
Select (Pin 1)
Nibble select. This input determines the nibble to be trans-
ferred to the outputs. A low level on this input selects the A
inputs and a high level selects the B inputs.
Output Enable (Pin 15)
Output Enable. A low level on this input allows the selected
input data to be presented at the outputs. A high level on this
input forces the outputs into the high–impedance state.
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