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參數(shù)資料
型號: MC74HC163ADTR2G
廠商: ON Semiconductor
文件頁數(shù): 9/15頁
文件大小: 0K
描述: LOG CMOS COUNTER 4BIT TSSOP 16
標(biāo)準(zhǔn)包裝: 2,500
系列: 74HC
邏輯類型: 二進(jìn)制計數(shù)器
方向:
元件數(shù): 1
每個元件的位元數(shù): 4
復(fù)位: 同步
計時: 同步
計數(shù)速率: 140MHz
觸發(fā)器類型: 正邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
MC74HC161A, MC74HC163A
http://onsemi.com
3
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
*0.5 to )7.0
V
VI
DC Input Voltage
*0.5 to VCC )0.5
V
VO
DC Output Voltage
(Note 1)
*0.5 v VO v VCC )0.5
V
IIK
DC Input Diode Current
$20
mA
IOK
DC Output Diode Current
$25
mA
IO
DC Output Sink Current
$25
mA
ICC
DC Supply Current per Supply Pin
$50
mA
IGND
DC Ground Current per Ground Pin
$50
mA
TSTG
Storage Temperature Range
*65 to )150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
_C
TJ
Junction Temperature Under Bias
)150
_C
qJA
Thermal Resistance
SOIC
TSSOP
112
148
_C/W
PD
Power Dissipation in Still Air at 85_C
SOIC
TSSOP
500
450
mW
MSL
Moisture Sensitivity
Level 1
FR
Flammability Rating
Oxygen Index: 30% 35%
UL 94 V0 @ 0.125 in
VESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
u2000
u200
V
ILATCHUP Latchup Performance
Above VCC and Below GND at 85_C (Note 4)
$300
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
2. Tested to EIA/JESD22A114A.
3. Tested to EIA/JESD22A115A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage
(Referenced to GND)
2.0
6.0
V
Vin, Vout
DC Input Voltage, Output Voltage
(Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
*55
)125
_C
tr, tf
Input Rise and Fall Time (Figure 4)
VCC = 2.0 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 6.0 V
0
1000
600
500
400
ns
5. Unused inputs may not be left open. All inputs must be tied to a high or lowlogic input voltage level.
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