參數(shù)資料
型號(hào): MC74HC160ADR2G
廠商: ON Semiconductor
文件頁數(shù): 9/12頁
文件大?。?/td> 0K
描述: IC COUNTER 4-BIT SYNC 16-SOIC
標(biāo)準(zhǔn)包裝: 2,500
系列: 74HC
邏輯類型: BCD 計(jì)數(shù)器
方向:
元件數(shù): 1
每個(gè)元件的位元數(shù): 4
復(fù)位: 異步
計(jì)時(shí): 同步
計(jì)數(shù)速率: 35MHz
觸發(fā)器類型: 正邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
MC74HC160A
http://onsemi.com
6
FUNCTION DESCRIPTION
The HC160A is a programmable 4bit synchronous
counters that feature parallel Load, synchronous or
asynchronous Reset, a Carry Output for cascading, and
countenable controls. The HC160A is a BCD counter with
asynchronous Reset.
INPUTS
Clock (Pin 2)
The internal flipflops toggle and the output count
advances with the rising edge of the Clock input. In addition,
control functions, such as loading occur with the rising edge
of the Clock input.
Preset Data Inputs P0, P1, P2, P3 (Pins 3, 4, 5, 6)
These are the data inputs for programmable counting.
Data on these pins may be synchronously loaded into the
internal flipflops and appear at the counter outputs. P0 (pin
3) is the leastsignificant bit and P3 (pin 6) is the
mostsignificant bit.
OUTPUTS
Q0, Q1, Q2, Q3 (Pins 14, 13, 12, 11)
These are the counter outputs (BCD or binary). Q0 (pin
14) is the leastsignificant bit and Q3 (pin 11) is the
mostsignificant bit.
Ripple Carry Out (Pin 15)
When the counter is in its maximum state (1001 for the
BCD counters or 1111 for the binary counters), this output
goes high, providing an external lookahead carry pulse that
may be used to enable successive cascaded counters. Ripple
Carry Out remains high only during the maximum count
state. The logic equation for this output is:
Ripple Carry Out =
Enable T
Q0 Q1 Q2 Q3
for BCD counters
CONTROL FUNCTIONS
Resetting
A low level on the Reset pin (pin 1) resets the internal
flipflops and sets the outputs (Q0 through Q3) to a low
level. The HC160A resets asynchronously.
Loading
With the rising edge of the Clock, a low level on Load (pin
9) loads the data from the Preset Data Input pins (P0, P1, P2,
P3) into the internal flipflops and onto the output pins, Q0
through Q3. The count function is disabled as long as Load
is low.
Although the HC160A is a BCD counters, they may be
programmed to any state. If they are loaded with a state
disallowed in BCD code, they will return to their normal
count sequence within two clock pulses (see the Output State
Diagram).
Count Enable/Disable
These devices have two countenable control pins:
Enable P (pin 7) and Enable T (pin 10). The devices count
when these two pins and the Load pin are high. The logic
equation is:
Count Enable = Enable P
Enable T Load
The count is either enabled or disabled by the control
inputs according to Table 1. In general, Enable P is a
countenable control; Enable T is both a countenable and
a RippleCarry Output control.
Table 1. COUNT ENABLE/DISABLE
Control Inputs
Result at Outputs
Load
Enable P Enable T
Q0 Q3
Ripple Carry Out
H
Count
High when
Q0 Q3 are max-
imum*
L
H
No Count
X
L
H
No Count
High when
Q0 Q3 are max-
imum*
X
L
No Count
L
*Q0 through Q3 are maximum for the HC160A when Q3 Q2 Q1 Q0
= 1001.
0
123
4
5
6
7
8
9
10
11
12
13
14
15
Figure 2. Output State Diagrams HC160A BCD Counters
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