參數(shù)資料
型號: MC74HC10
廠商: Motorola, Inc.
英文描述: Triple 3-Input NAND Gate
中文描述: 三3輸入與非門
文件頁數(shù): 1/5頁
文件大?。?/td> 133K
代理商: MC74HC10
SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
12/97
High–Performance Silicon–Gate CMOS
The MC74HC10A is identical in pinout to the LS10. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 36 FETs or 9 Equivalent Gates
LOGIC DIAGRAM
PIN 14 = VCC
PIN 7 = GND
Y = ABC
A1
B1
C1
A2
B2
C2
A3
B3
C3
Y1
1
2
13
Y2
Y3
3
4
5
9
10
11
12
6
8
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
FUNCTION TABLE
PIN ASSIGNMENT
A
L
X
X
H
11
12
13
14
8
9
10
5
4
3
2
1
7
6
B3
C3
Y1
C1
VCC
Y3
A3
B2
A2
B1
A1
GND
Y2
C2
Inputs
B
Output
Y
X
L
X
H
C
X
X
L
H
H
H
H
L
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Plastic
SOIC
TSSOP
1
14
1
14
1
14
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
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