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參數(shù)資料
| 型號： | MC74F646DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Automotive Catalog 220nA Supervisor with 10ms/200ms Selectable Delay Time 5-SOT-23 -40 to 125 |
| 中文描述： | F/FAST SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 6/6頁 |
| 文件大?。?/td> | 115K |
| 代理商： | MC74F646DW |
4-246
FAST AND LS TTL DATA
MC54/74F646
MC54/74F648
AC ELECTRICAL CHARACTERISTICS
54/74F
54F
74F
TA = +25
°
C
VCC = +5.0 V
CL = 50 pF
RL = 500
TA = –55
°
C
to +125
°
C
VCC = +5.0 V
±
10%
CL = 50 pF
RL = 500
TA = 0
°
C to +70
°
C
VCC = +5.0 V
±
10%
CL = 50 pF
RL = 500
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Unit
fMAX
tPLH
tPHL
Maximum Clock Frequency
100
—
75
—
90
—
MHz
Propagation Delay
Clock to Bus
2.0
2.0
7.0
8.0
2.0
2.0
8.5
9.5
2.0
2.0
8.0
9.0
ns
tPLH
tPHL
Propagation Delay
Bus to Bus (F646)
1.0
1.0
7.0
6.5
1.0
1.0
8.0
8.0
1.0
1.0
7.5
7.0
ns
tPLH
tPHL
Propagation Delay
Bus to Bus (F648)
1.0
1.0
7.0
6.5
1.0
1.0
10.0
9.0
1.0
1.0
7.5
7.0
ns
tPLH
tPHL
Propagation Delay
SBA or SAB to An or Bn
2.0
2.0
7.5
7.5
2.0
2.0
10.0
10.0
2.0
2.0
9.0
9.0
ns
tPZH
tPZL
Output Enable Time
OE to An or Bn
2.0
2.0
7.0
7.0
2.0
2.0
9.5
9.5
2.0
2.0
8.5
8.5
ns
tPHZ
tPLZ
Output Disable Time
OE to An or Bn
1.0
2.0
7.0
7.0
1.0
2.0
9.5
9.5
1.0
2.0
8.5
8.5
ns
tPZH
tPZL
Output Enable Time
DIR to An or Bn
2.0
2.0
7.0
7.0
2.0
2.0
9.5
9.5
2.0
2.0
8.5
8.5
ns
tPHZ
tPLZ
Output Disable Time
DIR to An or Bn
1.0
2.0
7.0
7.0
1.0
2.0
9.5
9.5
1.0
2.0
8.5
8.5
ns
AC OPERATING REQUIREMENTS
54/74F
54F
74F
TA = +25
°
C
VCC = +5.0 V
CL = 50 pF
RL = 500
Min
TA = –55
°
C to +125
°
C
VCC = +5.0 V
±
10%
CL = 50 pF
RL = 500
Min
TA = 0
°
C to +70
°
C
VCC = +5.0 V
±
10%
CL = 50 pF
RL = 500
Min
Symbol
Parameter
Max
Max
Max
Unit
ts(H)
ts(L)
Setup Time, HIGH or LOW
Bus to Clock
4.0
4.0
—
—
5.0
5.0
—
—
5.0
5.0
—
—
ns
th(H)
th(L)
Hold Time, HIGH or LOW
Bus to Clock
0.0
0.0
—
—
0.0
0.0
—
—
0.0
0.0
—
—
ns
tw(H)
tw(L)
Clock Pulse Width
HIGH or LOW
4.0
5.0
—
—
4.0
5.0
—
—
4.0
5.0
—
—
ns
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