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參數(shù)資料
| 型號： | MC74F381DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-BIT ARITHMETIC LOGIC UNIT |
| 中文描述： | F/FAST SERIES, 4-BIT ARITHMETIC LOGIC UNIT, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MC74F381DW |
4-181
FAST AND LS TTL DATA
MC54/74F381
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
VIH
VIL
VIK
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage
Input LOW Voltage
0.8
V
Guaranteed Input LOW Voltage
Input Clamp Diode Voltage
–1.2
V
IIN = –18 mA
IOH = –1.0 mA
IOH = –1.0 mA
IOL = 20 mA
VIN = 2.7 V
VIN = 7.0 V
VCC = MIN
VCC = 4.5 V
VCC = 4.75 V
VCC = MIN
VOH
Output HIGH Voltage
54, 74
2.5
3.4
V
74
2.7
3.4
V
VOL
Output LOW Voltage
0.35
0.5
V
IIH
Input HIGH Current
20
μ
A
VCC = MAX
100
μ
A
IIL
Input LOW Current
S0–S2 Inputs
Other Inputs
–0.6
mA
VIN = 0.5 V
VIN = 0.5 V
VCC = MAX
–2.4
mA
IOS
Output Short Circuit
Current (Note 2)
–60
–150
mA
VOUT = 0 V
VCC = MAX
ICC
Power Supply Current
59
89
mA
S0–S2 = GND;
Other Inputs HIGH
VCC = MAX
NOTES:
1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
FUNCTIONAL DESCRIPTION
Signals applied to the Select inputs S0–S2 determine the
mode of operation, as indicated in the Function Select Table.
An extensive listing of input and output levels is shown in the
Truth Table. The circuit performs the arithmetic functions for
either active-HIGH or active-LOW operands, with output lev-
els in the same convention. In the Subtract operating modes,
it is necessary to force a carry (HIGH for active-HIGH oper-
ands, LOW for active-LOW operands) into the Cn input of the
least significant package.
The Carry Generate (G) and Carry Propagate (P) outputs
supply input signals to the F182 carry lookahead generator for
expansion to longer word length, as shown in Figure 1. Note
that an F382 ALU is used for the most significant package.
Typical delays for Figure 1 are given in Figure 2.
FUNCTION SELECT TABLE
Select
Operation
S0
L
H
L
H
L
H
L
H
S1
L
L
H
H
L
L
H
H
S2
L
L
L
L
H
H
H
H
Clear
B Minus A
A Minus B
A Plus B
A
⊕
B
A + B
AB
Preset
H = HIGH Voltage Level L = LOW Voltage Level
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