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參數(shù)資料
| 型號： | MC74ACT194N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER |
| 中文描述： | ACT SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 213K |
| 代理商： | MC74ACT194N |
5-1
FACT DATA
The MC74AC194/74ACT194 is a high-speed 4-bit bidirectional universal shift
register. As a high-speed multifunctional, sequential building block, it is useful in
a wide variety of applications. It may be used in serial-serial, shift left, shift right,
serial-parallel, parallel-serial, and parallel-parallel data register transfers. The
′
AC/ACT194 is similar in operation to the
′
AS195 universal shift register, with
added features of shift left without external connections and hold (do nothing)
modes of operation.
Typical Shift Frequency of 150 MHz
Asynchronous Master Reset
Hold (Do Nothing) Mode
Fully Synchronous Serial or Parallel Data Transfers
FUNCTIONAL DESCRIPTION
The MC74AC/74ACT194 contains four edge-triggered D flip-flops and the
necessary interstage logic to synchronously perform shift right, shift left, parallel
load and hold operations. Signals applied to the Select (S0, S1) inputs
determine the type of operation, as shown in the Mode Select Table. Signals
on the Select, Parallel data (P0–P3) and Serial data (DSR, DSL) inputs can
change when the clock is in either state, provided only that the recommended
setup and hold times, with respect to the clock rising edge, are observed. A
LOW signal on Master Reset (MR) overrides all other inputs and forces the
outputs LOW.
MODE SELECT TABLE
Mode
Inputs
Outputs
Operating
MR
S1
X
S0
X
DSR
X
DSL
X
Pn
Q0
L
Q1
L
Q2
L
Q3
L
Reset
L
X
Hold
H
l
l
X
X
X
q0
q1
q1
L
H
q1
q2
q2
q0
q0
p1
q2
q3
q3
q1
q1
p2
q3
L
H
Shift Left
H
H
h
h
l
l
X
X
l
X
X
h
Shift Right
H
H
l
l
h
h
l
X
X
X
X
q2
q2
p3
h
Parallel Load
H
h
h
X
X
pn
p0
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition.
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition.
Pn (qn) = Lower case letters indicate the state of the referenced input (or output) one setup
time prior to the LOW-to-HIGH clock transition.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
4-BIT BIDIRECTIONAL
UNIVERSAL SHIFT
REGISTER
N SUFFIX
CASE 648-08
PLASTIC
D SUFFIX
CASE 751B-05
PLASTIC
1
2
3
4
5
6
7
12
13
14
15
9
10
11
MR
CP
S1
S0
DSRP0P1P2P3DSL
Q0Q1Q2Q3
VCC
GND
DSL
P3
P2
P1
15
16
14
12
11
10
2
1
3
4
5
6
7
9
8
P0
DSR
MR
S0
S1
CP
Q3
Q2
Q1
Q0
13
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