參數(shù)資料
型號: MC74AC573DTR2
廠商: ON Semiconductor
文件頁數(shù): 1/12頁
文件大小: 0K
描述: IC LATCH OCTAL 20-TSSOP
產(chǎn)品變化通告: Product Obsolescence 24/Jan/2011
標(biāo)準(zhǔn)包裝: 2,500
系列: 74AC
邏輯類型: D 型透明鎖存器
電路: 8:8
輸出類型: 三態(tài)
電源電壓: 2 V ~ 6 V
獨立電路: 1
延遲時間 - 傳輸: 10ns
輸出電流高,低: 24mA,24mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2005
September, 2005 Rev. 7
1
Publication Order Number:
MC74AC573/D
MC74AC573, MC74ACT573
Octal Buffer/Line Driver
with 3State Outputs
The MC74AC573/74ACT573 is a highspeed octal latch with
buffered common Latch Enable (LE) and buffered common Output
Enable (OE) inputs.
The MC74AC573/74ACT573 is functionally identical to the
MC74AC373/74ACT373 but has inputs and outputs on opposite sides.
Features
Inputs and Outputs on Opposite Sides of Package Allowing Easy
Interface with Microprocessors
Useful as Input or Output Port for Microprocessors
Functionally Identical to MC74AC373/74ACT373
3State Outputs for Bus Interfacing
Outputs Source/Sink 24 mA
′ACT573 Has TTL Compatible Inputs
PbFree Packages are Available*
Figure 1. Pinout 20Lead Packages Conductors
(Top View)
19
20
18
17
16
15
14
2
1
3456
7
VCC
13
8
12
9
11
10
O0
O1
O2
O3
O4
O5
O6
O7
LE
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
PIN ASSIGNMENT
PIN
FUNCTION
D0D7
Data Inputs
LE
Latch Enable Input
OE
3State Output Enable Input
O0O7
3State Latch Outputs
Figure 2. Logic Symbol
D0 D1 D2 D3 D4 D5 D6 D7
LE
O1 O2 O3 O4 O5 O6 O7
OE
O0
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
1
20
PDIP20
N SUFFIX
CASE 738
1
20
1
20
1
20
SO20
DW SUFFIX
CASE 751D
TSSOP20
DT SUFFIX
CASE 948E
EIAJ20
M SUFFIX
CASE 967
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
MC74xxx573N
AWLYYWWG
xxx573
AWLYYWWG
xxx
573
ALYW
G
74xxx573
AWLYWWG
xxx
= AC or ACT
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or
G = PbFree Package
(Note: Microdot may be in either location)
MARKING
DIAGRAM
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