參數(shù)資料
型號(hào): MC74AC257
廠商: ON SEMICONDUCTOR
英文描述: QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
中文描述: 四2輸入多路復(fù)用器與三態(tài)輸出
文件頁數(shù): 2/8頁
文件大?。?/td> 173K
代理商: MC74AC257
MC74AC257 MC74ACT257
5-2
FACT DATA
FUNCTIONAL DESCRIPTION
The MC74AC257/74ACT257 is a quad 2-input multiplexer
with 3-state outputs. It selects four bits of data from two
sources under control of a Common Data Select input. When
the Select input is LOW, the I0x inputs are selected and when
Select is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in true (noninverted)
form. The device is the logic implementation of a 4-pole,
2-position switch where the position of the switch is
determined by the logic levels supplied to the Select input. The
logic equations for the outputs are shown below:
Za = OE
(I1a
S+I0a
S)
Zb = OE
(I1b
S+I0b
S)
Zc = OE
(I1c
S+I0c
S)
Zd = OE
(I1d
S+I0d
S)
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals to
3-state devices whose outputs are tied together are designed
so there is no overlap.
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
OE
I0a
I1a
I0b
I1b
I0c
I1c
I0d
I1d
S
Za
Zb
Zc
Zd
LOGIC DIAGRAM
相關(guān)PDF資料
PDF描述
MC74ACT257 QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
MC74AC257N QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
MC74ACT257D QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
MC74ACT257N QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
MC74AC258D QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
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