
Serial Communications Interface (SCI)
SCI I/O Registers
MC68HC705C8A — Rev. 3
Technical Data
MOTOROLA
Serial Communications Interface (SCI)
WAKE — Wakeup Bit
This read/write bit determines which condition wakes up the SCI: a
logic 1 (address mark) in the most significant bit position of a received
character or an idle condition of the PD0/RDI pin. Reset has no effect
on the WAKE bit.
1 = Address mark wakeup
0 = Idle line wakeup
10.6.3 SCI Control Register 2
SCI control register 2 (SCCR2) shown in Figure 10-7 has these
functions:
Enables the SCI receiver and SCI receiver interrupts
Enables the SCI transmitter and SCI transmitter interrupts
Enables SCI receiver idle interrupts
Enables SCI transmission complete interrupts
Enables SCI wakeup
Transmits SCI break characters
TIE — Transmit Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TDRE bit
becomes set. Reset clears the TIE bit.
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
Address:
$000F
Bit 7
6
54321
Bit 0
Read:
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
Write:
Reset:
00
000000
Figure 10-7. SCI Control Register 2 (SCCR2)
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