
Serial Communication Controllers (SCCs)
MOTOROLA
MC68360 USER’S MANUAL
7-131
Figure 7-39. Output Delays from RTS Asserted for Synchronous Protocols
If the CTS pin is not already asserted when the RTS pin is asserted, then the delays to the
first bit of data depend on when CTS is asserted. Figure 7-40 shows the delay between CTS
and the data can be approximately 0.5 to 1 bit time or 0 bit times, depending on the CTSS
bit in the GSMR.
TXD
RTS
CTS
FIRST BIT OF FRAME DATA
LAST BIT OF FRAME DATA
(INPUT)
TCLK
(OUTPUT)
NOTES:
1. A frame includes opening and closing flags and syncs, if present in the protocol.