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參數(shù)資料
| 型號(hào)： | MC68L11F1CFN3 |
| 廠(chǎng)商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | Audio control and Instrumentation Cable; Number of Conductors:10; Conductor Size AWG:22; No. Strands x Strand Size:7 x 30; Jacket Material:Polyvinylchloride (PVC); Conductor Material:Copper; Jacket Color:Gray RoHS Compliant: Yes |
| 中文描述： | 8-BIT, EEPROM, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁(yè)數(shù)： | 34/68頁(yè) |
| 文件大?。?/td> | 486K |
| 代理商： | MC68L11F1CFN3 |
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MOTOROLA
34
MC68HC11F1/FC0
MC68HC11FTS/D
7.7 Port G
Port G is an eight-bit general-purpose I/O port with a data register (PORTG) and a data direction register
(DDRG). When enabled, the upper four lines (PG[7:4] can be used as chip-select outputs in expanded
modes. When any of these pins are not being used for chip selects, they can be used for general-pur-
pose I/O. Port G can be configured for wired-OR operation by setting the GWOM bit in the OPT2 reg-
ister.
NOTE
PG[1:0] are not available on the 64-pin MC68HC11FC0.
7.8 Parallel I/O Registers
Port pin function is mode dependent. Do not confuse pin function with the electrical state of the pin at
reset. Port pins are either driven to a specified logic level or are configured as high impedance inputs.
I/O pins configured as high-impedance inputs have port data that is indeterminate. The contents of the
corresponding latches are dependent upon the electrical state of the pins during reset. In port descrip-
tions, an “I” indicates this condition. Port pins that are driven to a known logic level during reset are
shown with a value of either one or zero. Some control bits are unaffected by reset. Reset states for
these bits are indicated with a “U”.
I = Indeterminate value
For DDRx bits, 0 = input and 1 = output.
*These bits are not present on the 64-pin QFP version of the MC68HC11FC0.
I = Indeterminate value
PORTA —
Port A Data Register
$x000
Bit 7
6
5
4
3
2
1
Bit 0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
RESET:
I
I
I
I
I
I
I
I
Alternate
Function:
PAI
OC2
OC3
OC4
OC5/IC4
IC1
IC2
IC3
And/or:
OC1
OC1
OC1
OC1
OC1
—
—
—
DDRA —
Port A
Data Direction Register
$x001
Bit 7
6
5
4
3
2
1
Bit 0
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
RESET:
0
0
0
0
0
0
0
0
PORTG —
Port G Data Register
$x002
Bit 7
6
5
4
3
2
1
Bit 0
PG7
PG6
PG5
PG4
PG3
PG2
PG1*
PG0*
RESET:
I
I
I
I
I
I
I
I
Alternate
Function:
CSPROG
CSGEN
CSIO1
CSIO2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68L11F1CPU3 | Multiconductor Cable; Number of Conductors:12; Conductor Size AWG:22; No. Strands x Strand Size:7 x 30; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Conductor Material:Copper; Features:Unshielded RoHS Compliant: Yes |
| MC68L11F1FN3 | Multiconductor Audio, Control & Instrumentation Cable; Number of Conductors:15; Conductor Size AWG:22; No. Strands x Strand Size:7 x 30; Jacket Material:Polyvinylchloride (PVC); Conductor Material:Copper; Conductor Plating:Tin RoHS Compliant: Yes |
| MC68L11F1PU3 | Technical Summary 8-Bit Microcontroller |
| MC74AC00 | QUAD 2-INPUT NAND GATE |
| MC74AC00 | QUAD 2-INPUT NAND GATE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68L11F1CFNE3 | 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512BYTES RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68L11K1FN2R2 | 制造商:Motorola Inc 功能描述: |
| MC68L11K1FUE2 | 功能描述:8位微控制器 -MCU 8B MCU L-VOLTAGE-EPP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68L711E9FN2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68L711E9FNE2 | 功能描述:8位微控制器 -MCU 8B MCU LO VOLTAGE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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