
Development Support
Break Module (BRK)
MC68HLC908QY/QT Family — Rev. 2
Data Sheet
MOTOROLA
Development Support
149
Figure 15-2. Break Module Block Diagram
Addr.
Register Name
Bit 7
654321
Bit 0
$FE00
Break Status Register
(BSR)
Read:
RRRRRR
SBSW
R
Write:
Note(1)
Reset:
0
$FE02
Break Auxiliary Register
(BRKAR)
Read:
0000000
BDCOP
Write:
Reset:
00000000
$FE03
Break Flag Control
Register (BFCR)
Read:
BCFE
RRRRRRR
Write:
Reset:
0
$FE09
Break Address High
Register (BRKH)
Read:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Write:
Reset:
00000000
$FE0A
Break Address Low
Register (BRKL)
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Write:
Reset:
00000000
$FE0B
Break Status and Control
Register (BRKSCR)
Read:
BRKE
BRKA
000000
Write:
Reset:
00000000
1. Writing a 0 clears SBSW.
= Unimplemented
R
= Reserved
Figure 15-3. Break I/O Register Summary
ADDRESS BUS[15:8]
ADDRESS BUS[7:0]
8-BIT COMPARATOR
CONTROL
BREAK ADDRESS REGISTER LOW
BREAK ADDRESS REGISTER HIGH
ADDRESS BUS[15:0]
BKPT
(TO SIM)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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