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參數(shù)資料
| 型號： | MC68HLC908QY2DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 10/186頁 |
| 文件大小： | 2583K |
| 代理商： | MC68HLC908QY2DW |
Input/Output Ports (PORTS)
Port B
MC68HLC908QY/QT Family — Rev. 2
Data Sheet
MOTOROLA
Input/Output Ports (PORTS)
107
12.3 Port B
Port B is an 8-bit general purpose I/O port. Port B is only available on the
MC68HLC908QY1, MC68HLC908QY2, and MC68HLC908QY4.
12.3.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight port B
pins.
PTB[7:0] — Port B Data Bits
These read/write bits are software programmable. Data direction of each port B
pin is under the control of the corresponding bit in data direction register B.
Reset has no effect on port B data.
12.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or
an output. Writing a 1 to a DDRB bit enables the output buffer for the corresponding
port B pin; a 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB[7:0],
configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE:
Avoid glitches on port B pins by writing to the port B data register before changing
data direction register B bits from 0 to 1. Figure 12-8 shows the port B I/O logic.
Address: $0001
Bit 7
6
54
32
1
Bit 0
Read:
PTB7
PTB6
PTB5
PTB4
PTB3
PTB2
PTB1
PTB0
Write:
Reset:
Unaffected by reset
Figure 12-6. Port B Data Register (PTB)
Address: $0005
Bit 7
6
543
21
Bit 0
Read:
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Write:
Reset:
00
000
00
0
Figure 12-7. Data Direction Register B (DDRB)
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| MC68HLC908QY4CDW | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
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