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參數(shù)資料
| 型號(hào)： | MC68HLC908QT4P |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 124/186頁(yè) |
| 文件大小： | 2583K |
| 代理商： | MC68HLC908QT4P |
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Analog-to-Digital Converter (ADC)
Data Sheet
MC68HLC908QY/QT Family — Rev. 2
42
Analog-to-Digital Converter (ADC)
MOTOROLA
3.3.1 ADC Port I/O Pins
PTA0, PTA1, PTA4, and PTA5 are general-purpose I/O pins that are shared with
the ADC channels. The channel select bits (ADC status and control register
(ADSCR), $003C), define which ADC channel/port pin will be used as the input
signal. The ADC overrides the port I/O logic by forcing that pin as input to the ADC.
The remaining ADC channels/port pins are controlled by the port I/O logic and can
be used as general-purpose I/O. Writes to the port register or data direction register
(DDR) will not have any affect on the port pin that is selected by the ADC. Read of
a port pin which is in use by the ADC will return a 0 if the corresponding DDR bit is
at 0. If the DDR bit is 1, the value in the port data latch is read.
3.3.2 Voltage Conversion
When the input voltage to the ADC equals VDD, the ADC converts the signal to $FF
(full scale). If the input voltage equals VSS, the ADC converts it to $00. Input
voltages between VDD and VSS are a straight-line linear conversion. All other input
voltages will result in $FF if greater than VDD and $00 if less than VSS.
NOTE:
Input voltage should not exceed the analog supply voltages.
3.3.3 Conversion Time
Sixteen ADC internal clocks are required to perform one conversion. The ADC
starts a conversion on the first rising edge of the ADC internal clock immediately
following a write to the ADSCR. If the ADC internal clock is selected to run at
1 MHz, then one conversion will take 16
s to complete. With a 1-MHz ADC
internal clock the maximum sample rate is 62.5 kHz.
3.3.4 Continuous Conversion
In the continuous conversion mode (ADCO = 1), the ADC continuously converts
the selected channel filling the ADC data register (ADR) with new data after each
conversion. Data from the previous conversion will be overwritten whether that
data has been read or not. Conversions will continue until the ADCO bit is cleared.
The COCO bit (ADSCR, $003C) is set after each conversion and will stay set until
the next read of the ADC data register.
When a conversion is in process and the ADSCR is written, the current conversion
data should be discarded to prevent an incorrect reading.
3.3.5 Accuracy and Precision
The conversion process is monotonic and has no missing codes.
16 ADC Clock Cycles
Conversion Time =
ADC Clock Frequency
Number of Bus Cycles = Conversion Time
× Bus Frequency
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HLC908QT2P | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDIP8 |
| MC68HLC908QT2FQ | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PQCC8 |
| MC68HLC908QT1DW | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO8 |
| MC68HLC908QY2DT | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO16 |
| MC68HLC908QY4CDW | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HLC908QY1CDW | 制造商:Rochester Electronics LLC 功能描述:LOW V-1.5K FLASH W/O ADC - Bulk |
| MC68HLC908QY1DT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| MC68HLC908QY2CDT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QY2CDW | 制造商:Rochester Electronics LLC 功能描述:LOW V-1.5K FLASH W/ADC - Bulk |
| MC68HLC908QY2CP | 制造商:Rochester Electronics LLC 功能描述:LOW V-1.5K FLASH W/ADC - Bulk |
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