參數(shù)資料
型號: MC68HLC705KJ1CP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 81/108頁
文件大小: 719K
代理商: MC68HLC705KJ1CP
Resets and Interrupts
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
74
Freescale Semiconductor
Figure 8-4. External Interrupt Logic
Figure 8-5. External Interrupt Timing
Table 8-2. External Interrupt Timing (VDD = 5.0 Vdc)
(1)
1. VDD = 5.0 Vdc ±10%, VSS = 0 Vdc, TA = –40°C to +85°C, unless otherwise noted.
Characteristic
Symbol
Min
Max
Unit
Interrupt Pulse Width Low (Edge-Triggered)
tILIH
125
ns
Interrupt Pulse Period
tILIL
Note(2)
2. The minimum tILIL should not be less than the number of interrupt service routine cycles plus 19 tcyc.
tcyc
Table 8-3. External Interrupt Timing (VDD = 3.3 Vdc)
(1)
1. VDD = 3.3 Vdc ±10%, VSS = 0 Vdc, TA = –40°C to +85°C unless otherwise noted.
Characteristic
Symbol
Min
Max
Unit
Interrupt Pulse Width Low (Edge-Triggered)
tILIH
250
ns
Interrupt Pulse Period
tILIL
Note(2)
2. The minimum tILIL should not be less than the number of interrupt service routine cycles plus 19 tcyc.
tcyc
PIRQ
LEVEL-SENSITIVE TRIGGER
PA3
PA2
PA1
IRQ
PA0
VDD
(MOR LEVEL BIT)
RESET
IRQ VECTOR FETCH
EXTERNAL
INTERRUPT
REQUEST
(MOR)
TO BIH & BIL
INSTRUCTION
PROCESSING
IRQF
IRQR
IRQE
DQ
CK
IRQ
CLR
LATCH
IRQ
tILIH
tILIL
tILIH
EXT. INT. PIN
EXT. INT. PIN1
EXT. INT. PINn
.
(INTERNAL)
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