參數(shù)資料
型號: MC68HCL05J1ADWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 96/126頁
文件大小: 1118K
代理商: MC68HCL05J1ADWR2
Multifunction Timer
Timer Status and Control Register
MC68HC05J1A — Rev. 1.0
Technical Data
MOTOROLA
Multifunction Timer
71
8.3 Timer Status and Control Register
The read/write timer status and control register (TSCR) contains these
bits:
Timer interrupt enable bits
Timer interrupt flags
Timer interrupt flag reset bits
Timer interrupt rate select bits
TOF — Timer Overflow Flag
This read-only flag becomes set when the first eight stages of the
counter roll over from $FF to $00. TOF generates a timer overflow
interrupt request if TOIE is also set. Clear TOF by writing a logic 1 to
the TOFR bit. Writing to TOF has no effect. Reset clears TOF.
RTIF — Real-Time Interrupt Flag
This read-only flag becomes set when the selected real-time interrupt
(RTI) output becomes active. RTIF generates a real-time interrupt
request if RTIE is also set. Clear RTIF by writing a logic 1 to the
RTIFR bit. Writing to RTIF has no effect. Reset clears RTIF.
TOIE — Timer Overflow Interrupt Enable Bit
This read/write bit enables timer overflow interrupts.
1 = Timer overflow interrupts enabled
0 = Timer overflow interrupts disabled
Address:
$0008
Bit 7
654321
Bit 0
Read:
TOF
RTIF
TOIE
RTIE
00
RT1
RT0
Write:
TOFR
RTIFR
Reset:
00000011
= Unimplemented
Figure 8-2. Timer Status and Control Register (TSCR)
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