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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MC68HC908QT4CPE |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 16/184闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU 4K FLASH W/ADC 8-DIP |
| 妯欐簴鍖呰锛� | 50 |
| 绯诲垪锛� | HC08 |
| 鏍稿績铏曠悊鍣細 | HC08 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 8MHz |
| 澶栧湇瑷倷锛� | LVD锛孭OR锛孭WM |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 5 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 4KB锛�4K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 128 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.7 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 4x8b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 8-DIP锛�0.300"锛�7.62mm锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 724 (CN2011-ZH PDF) |
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System Integration Module (SIM)
MC68HC908QY/QT Family Data Sheet, Rev. 6
112
Freescale Semiconductor
Figure 13-10
. Interrupt Recognition Example
13.6.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
NOTE
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC 鈥� 1, as a hardware interrupt does.
13.6.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources. Table 13-3 summarizes the
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
Table 13-3. Interrupt Sources
Priority
Source
Flag
Mask(1)
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI
instruction.
INT
Register
Flag
Vector
Address
Highest
Lowest
Reset
鈥�
$FFFE鈥�$FFFF
SWI instruction
鈥�
$FFFC鈥�$FFFD
IRQ pin
IRQF
IMASK
IF1
$FFFA鈥�$FFFB
Timer channel 0 interrupt
CH0F
CH0IE
IF3
$FFF6鈥�$FFF7
Timer channel 1 interrupt
CH1F
CH1IE
IF4
$FFF4鈥�$FFF5
Timer overflow interrupt
TOF
TOIE
IF5
$FFF2鈥�$FFF3
Keyboard interrupt
KEYF
IMASKK
IF14
$FFE0鈥�$FFE1
ADC conversion complete interrupt
COCO
AIEN
IF15
$FFDE鈥�$FFDF
CLI
LDA
INT1
PULH
RTI
INT2
BACKGROUND ROUTINE
#$FF
PSHH
INT1 INTERRUPT SERVICE ROUTINE
PULH
RTI
PSHH
INT2 INTERRUPT SERVICE ROUTINE
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| HCZ682KBCDJ0KR | CAP CER 6800PF 3KV 10% RADIAL |
| VE-B3V-CU-F3 | CONVERTER MOD DC/DC 5.8V 200W |
| V48A5T400B | CONVERTER MOD DC/DC 5V 400W |
| MC9S08LL16CLH | IC MCU 8BIT 16K FLASH 64-LQFP |
| MC9S08GT8AMFCE | IC MCU 8K FLASH 1K RAM 32-QFN |
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鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MC68HC908QT4MPE | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 4K FLASH W/ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| MC68HC908QT4VDW | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8 Bit 8MHz RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| MC68HC908QT4VPE | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 4K FLASH W/ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| MC68HC908QY1CDT | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8 Bit 8MHz RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| MC68HC908QY1CDTE | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 1.5K FLASH W/O ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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