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| 型號(hào)： | MC68HC908LB8VPE |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP20 |
| 封裝： | LEAD FREE, PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 129/234頁(yè) |
| 文件大?。?/td> | 1459K |
| 代理商： | MC68HC908LB8VPE |
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Development Support
MC68HC908LB8 Data Sheet, Rev. 1
214
Freescale Semiconductor
If entering monitor mode without high voltage on IRQ (above condition set 2 or 3, where applied voltage
is VDD or VSS), then startup port pin requirements and conditions, (PTA1/PTA4) are not in effect. This is
to reduce circuit requirements when performing in-circuit programming.
19.3.1.1 Normal Monitor Mode
RST and OSC1 functions will be active on the PTA5 and PTC0 pins, respectively, as long as VTST is
applied to the IRQ pin. If the IRQ pin is lowered (no longer VTST) then the chip will still be operating in
monitor mode, but the pin functions will be determined by the settings in the configuration register when
When monitor mode is entered with VTST on IRQ, the computer operating properly (COP) is disabled as
long as VTST is applied to IRQ. This condition states that as long as VTST is maintained on the IRQ pin
after entering monitor mode, then the COP will be disabled.
19.3.1.2 Forced Monitor Mode
If the voltage applied to the IRQ1 is less than VTST, the MCU will come out of reset in user mode.
However, when the reset vector is erased ($FFFF), the MCU is forced into monitor mode without requiring
high voltage on the IRQ1 pin. Once out of reset, the monitor code is initially executing off the internal clock
at its default frequency.
If IRQ is tied high (VDD), all pins will default to regular input port functions except for PTA0 and PTC0
which will operate as a serial communication port and OSC1 input respectively (refer to Figure 19-11).
That will allow the clock to be driven from an external source through OSC1 pin.
If IRQ is tied low, all pins will default to regular input port function except for PTA0 which will operate as
serial communication port. Refer to Figure 19-12. Regardless of the state of the IRQ pin, it will not function
as a port input pin in monitor mode.
The COP module is disabled in forced monitor mode.
NOTE
If the reset vector is blank and monitor mode is entered, the chip will see an
additional reset cycle after the initial power-on reset (POR). Once the part
has been programmed, the traditional method of applying a voltage, VTST,
to IRQ must be used to enter monitor mode.
19.3.1.3 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 19-2 summarizes the differences between user mode and monitor mode regarding vectors.
Table 19-2. Mode Difference
Modes
Functions
Reset
Vector
High
Reset
Vector
Low
Break
Vector
High
Break
Vector
Low
SWI
Vector
High
SWI
Vector
Low
User
$FFFE
$FFFF
$FFFC
$FFFD
$FFFC
$FFFD
Monitor
$FEFE
$FEFF
$FEFC
$FEFD
$FEFC
$FEFD
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