
Input/Output (I/O) Ports
Port E
MC68HC908JL8 — Rev. 2.0
Technical Data
MOTOROLA
Input/Output (I/O) Ports
233
Figure 13-16. Port E I/O Circuit
When DDREx is a logic 1, reading address $0008 reads the PTEx data
latch. When DDREx is a logic 0, reading address $0008 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit. Table 13-5 summarizes the operation
of the port E pins.
Table 13-5. Port E Pin Functions
DDRE
Bit
PTE Bit
I/O Pin
Mode
Accesses to DDRE
Accesses to PTE
Read/Write
Read
Write
0X(1)
NOTES:
1. X = don’t care.
Input, Hi-Z(2)
2. Hi-Z = high impedance.
DDRE[1:0]
Pin
PTE[1:0](3)
3. Writing affects data register, but does not affect the input.
1
X
Output
DDRE[1:0]
PTE[1:0]
READ DDRE ($000C)
WRITE DDRE ($000C)
RESET
WRITE PTE ($0008)
READ PTE ($0008)
PTEx
DDREx
PTEx
INT
E
R
N
A
LD
AT
A
BU
S
To TIM2