
MSCAN08 Controller (MSCAN08)
Data Sheet
MC68HC908GZ60 MC68HC908GZ48 MC68HC908GZ32
150
MSCAN08 Controller (MSCAN08)
MOTOROLA
Both buffers have a size of 13 bytes to store the CAN control bits, the identifier
(standard or extended), and the data content. For details, see 12.12 The receiver full flag (RXF) in the MSCAN08 receiver flag register (CRFLG),
signals the status of the foreground receive buffer. When the buffer contains a
correctly received message with matching identifier, this flag is set. See 12.13.5 On reception, each message is checked to see if it passes the filter (for details see
MSCAN08 copies the content of RxBG into RxFG(1), sets the RXF flag, and
generates a receive interrupt to the CPU(2). The user’s receive handler has to read
the received message from RxFG and to reset the RXF flag to acknowledge the
interrupt and to release the foreground buffer. A new message which can follow
immediately after the IFS field of the CAN frame, is received into RxBG. The
overwriting of the background buffer is independent of the identifier filter function.
When the MSCAN08 module is transmitting, the MSCAN08 receives its own
messages into the background receive buffer, RxBG. It does NOT overwrite RxFG,
generate a receive interrupt or acknowledge its own messages on the CAN bus.
other incoming messages. The MSCAN08 receives its own transmitted messages
in the event that it loses arbitration. If arbitration is lost, the MSCAN08 must be
prepared to become the receiver.
An overrun condition occurs when both the foreground and the background receive
message buffers are filled with correctly received messages with accepted
identifiers and another message is correctly received from the bus with an
accepted identifier. The latter message will be discarded and an error interrupt with
overrun indication will be generated if enabled. The MSCAN08 is still able to
transmit messages with both receive message buffers filled, but all incoming
messages are discarded.
12.4.3 Transmit Structures
The MSCAN08 has a triple transmit buffer scheme to allow multiple messages to
be set up in advance and to achieve an optimized real-time performance. The three
All three buffers have a 13-byte data structure similar to the outline of the receive
transmit buffer priority register (TBPR) contains an 8-bit “l(fā)ocal priority” field (PRIO)
1. Only if the RXF flag is not set.
2. The receive interrupt will occur only if not masked. A polling scheme can be applied on RXF also.