Memory
MC68HC908GT16 MC68HC908GT8 Data Sheet, Rev. 3
36
Freescale Semiconductor
$FE0C
LVI Status Register (LVISR)
See page 113.
Read:
LVIOUT
0
0
0
0
0
0
0
Write:
Reset:
0
0
0
0
0
0
0
0
$FF7E
FLASH Block Protect
Register (FLBPR)
(1)
See page 43.
Read:
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
BPR0
Write:
Reset:
Unaffected by reset
$FF80
ICG User Trim
Register 5V (ICGTR5)
(1)
See page 44.
Read:
TRIM7
TRIM6
TRIM5
TRIM4
TRIM3
TRIM2
TRIM1
TRIM0
Write:
Reset:
Unaffected by reset
$FF81
ICG User Trim
Register 3V (ICGTR3)
(1)
See page 44.
Read:
TRIM7
TRIM6
TRIM5
TRIM4
TRIM3
TRIM2
TRIM1
TRIM0
Write:
Reset:
Unaffected by reset
$FFFF
COP Control Register
(COPCTL)
See page 61.
Read:
Low byte of reset vector
Write:
Writing clears COP counter (any value)
Reset:
Unaffected by reset
1. N
on-volatile FLASH register
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 7)