
MCU Block Diagram
MC68HC908GR8 MC68HC908GR4 Data Sheet, Rev. 7
Freescale Semiconductor
21
1.3 MCU Block Diagram
Figure 1-1 shows the structure of the MC68HC908GR8.
Figure 1-1. MCU Block Diagram
SINGLE BRKPT BREAK
MODULE
CLOCK GENERATOR MODULE
24 INTR SYSTEM INTEGRATION
MODULE
PROGR. TIMEBASE
MODULE
MONITOR MODULE
SERIAL PERIPHERAL
1-CHANNEL TIMER INTERFACE
MODULE 2
DUAL V. LOW-VOLTAGE INHIBIT
MODULE
4-BIT KEYBOARD
ARITHMETIC/LOGIC
UNIT (ALU)
CPU
REGISTERS
M68HC08 CPU
CONTROL AND STATUS REGISTERS — 64 BYTES
MC68HC908GR8 USER FLASH — 7680 BYTES
USER RAM — 384 BYTES
MONITOR ROM — 310 BYTES
USER FLASH VECTOR SPACE — 36 BYTES
SINGLE EXTERNAL IRQ
MODULE
POR
T
A
DDRA
DDRD
PORT
D
DDRE
PORT
E
INTERNAL BUS
OSC1
OSC2
CGMXFC
* RST
* IRQ
INTERFACE MODULE
INTERRUPT MODULE
COMPUTER OPERATING
PROPERLY MODULE
PTA3/KBD3–
VDDAD / VREFH
8-BIT ANALOG-TO-DIGITAL
CONVERTER MODULE
PTD6/T2CH0
PTD5/T1CH1
PTD4/T1CH0
PTD3/SPSCK
PTD2/MOSI
PTD1/MISO
PTD0/SS
PTE1/RxD
PTE0/TxD
VSSAD / VREFL
2-CHANNEL TIMER INTERFACE
MODULE 1
32-kHz OSCILLATOR
PHASE-LOCKED LOOP
SERIAL COMMUNICATIONS
INTERFACE MODULE
DATA BUS SWITCH
MODULE
MEMORY MAP
MODULE
MASK OPTION REGISTER1
MODULE
SECURITY
MODULE
POWER
VSS
VDD
VSSA
VDDA
Ports are software configurable with pullup device if input port.
Higher current drive port pins
* Pin contains integrated pullup device
MONITOR MODE ENTRY
MODULE
PO
RT
B
DDRB
PTB5/AD5–
PO
R
T
C
DDRC
PTC1–PTC0
POWER-ON RESET
MODULE
FLASH PROGRAMMING (BURN-IN) ROM — 544 BYTES
MASK OPTION REGISTER2
MODULE
MC68HC908GR4 USER FLASH — 4096BYTES
PTA0/KBD0
PTB0/AD0