
MC68HC908GP20 — Rev 2.1
Advance Information
Freescale Semiconductor
231
When bit DDRBx is a logic 1, reading address $0001 reads the PTBx
data latch. When bit DDRBx is a logic 0, reading address $0001 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 16-3 summarizes
the operation of the port B pins.
Table 16-3. Port B Pin Functions
DDRB Bit
PTB Bit
I/O Pin Mode
Accesses
to DDRB
Accesses to PTB
Read/Write
Read
Write
0X(1)
Input, Hi-Z(2)
DDRB7–DDRB0
Pin
PTB7–PTB0(3)
1
X
Output
DDRB7–DDRB0
PTB7–PTB0
Notes:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.