
Input/Output (I/O) Section
MC68HC908EY16A MC68HC908EY8A Data Sheet, Rev. 0
Freescale Semiconductor
31
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0000
Port A Data Register
(PTA)
Read:
0
PTA6
PTA5
PTA4
PTA3
PTA2
PTA1
PTA0
Write:
Reset:
Unaffected by reset
$0001
Port B Data Register
(PTB)
Read:
PTB7
PTB6
PTB5
PTB4
PTB3
PTB2
PTB1
PTB0
Write:
Reset:
Unaffected by reset
$0002
Port C Data Register
(PTC)
Read:
000
PTC4
PTC3
PTC2
PTC1
PTC0
Write:
Reset:
Unaffected by reset
$0003
Port D Data Register
(PTD)
Read:
0000
0
PTD1
PTD0
Write:
Reset:
Unaffected by reset
$0004
Data Direction
Register A (DDRA)
Read:
0
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Write:
Reset:
0000
0
000
$0005
Data Direction
Register B (DDRB)
Read:
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Write:
Reset:
0000
0
000
$0006
Data Direction
Register C (DDRC)
Read:
MCLKEN
00
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
0000
0
000
$0007
Data Direction
Register D (DDRD)
Read:
0000
0
DDRD1
DDRD0
Write:
Reset:
0000
0
000
$0008
Port E Data Register
(PTE)
Read:
0000
0
PTE1
PTE0
Write:
Reset:
Unaffected by reset
$0009
Configuration Register 3
(CONFIG3)
Read:
RNGSEL
ESCISRE
SPISRE
MCLKSRE
PORTSRE
ESCISEL
SPISEL
Write:
Reset:
0100
0
000
$000A
Data Direction
Register E (DDRE)
Read:
0000
0
DDRE1
DDRE0
Write:
Reset:
0000
0
000
$000B
BEMF Register
(BEMF)
Read:
BEMF7
BEMF6
BEMF5
BEMF4
BEMF3
BEMF2
BEMF1
BEMF0
Write:
Reset:
0000
0
000
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)