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Serial Communications Interface (SCI)
MC68HC908AZ60A MC68HC908AS60A MC68HC908AS60E Data Sheet, Rev. 6
192
Freescale Semiconductor
18.7 I/O Signals
Port E shares two of its pins with the SCI module. The two SCI I/O pins are:
PTE0/SCTxD — Transmit data
PTE1/SCRxD — Receive data
18.7.1 PTE0/SCTxD (Transmit Data)
The PTE0/SCTxD pin is the serial data output from the SCI transmitter. The SCI shares the PTE0/SCTxD
pin with port E. When the SCI is enabled, the PTE0/SCTxD pin is an output regardless of the state of the
DDRE2 bit in data direction register E (DDRE).
18.7.2 PTE1/SCRxD (Receive Data)
The PTE1/SCRxD pin is the serial data input to the SCI receiver. The SCI shares the PTE1/SCRxD pin
with port E. When the SCI is enabled, the PTE1/SCRxD pin is an input regardless of the state of the
DDRE1 bit in data direction register E (DDRE).
18.8 I/O Registers
The following I/O registers control and monitor SCI operation:
SCI control register 1 (SCC1)
SCI control register 2 (SCC2)
SCI control register 3 (SCC3)
SCI status register 1 (SCS1)
SCI status register 2 (SCS2)
SCI data register (SCDR)
SCI baud rate register (SCBR)
18.8.1 SCI Control Register 1
SCI control register 1:
Enables loop mode operation
Enables the SCI
Controls output polarity
Controls character length
Controls SCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type