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Port C
MC68HC908GT16 MC68HC908GT8 Data Sheet, Rev. 3
Freescale Semiconductor
127
DDRB7–DDRB0 — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB7–DDRB0], configuring all port
B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 12-8
shows the port B I/O logic.
Figure 12-8. Port B I/O Circuit
When bit DDRBx is a 1, reading address $0001 reads the PTBx data latch. When bit DDRBx is a 0,
reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 12-3
summarizes the operation of the port B pins.
12.4 Port C
Port C is a 7-bit, general-purpose bidirectional I/O port. Port C also has software configurable pullup
devices if configured as an input port.
Table 12-3. Port B Pin Functions
DDRB
Bit
PTB
Bit
I/O Pin
Mode
Accesses to DDRB
Accesses to PTB
Read/Write
Read
Write
0
X
(1)
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
Input, Hi-Z
(2)
DDRB7–DDRB0
Pin
PTB7–PTB0
(3)
1
X
Output
DDRB7–DDRB0
PTB7–PTB0
PTB7–PTB0
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
PTBx
DDRBx
PTBx
I