
Parallel Input/Output
Technical Data
MC68HC11P2 — Rev 1.0
82
Parallel Input/Output
MOTOROLA
4.9.1 PORTG — Port G data register
The bits may be read and written at any time and are not affected by
reset.
4.9.2 DDRG — Data direction register for port G
DDG[7:0] — Data direction for port G
1 = The corresponding pin is configured as an output.
0 = The corresponding pin is configured as an input.
4.10 Port H
Port H is an 8-bit bidirectional port, with both data and data direction
registers. In addition to their I/O capability, port H pins are shared with
SCI/MI BUS and PWM functions, as shown in the following table.
On reset the pins are configured as general purpose high-impedance
inputs with selectable internal resistors. The internal resistors are pull-
Address bit 7bit 6
bit 5bit 4bit 3
bit 2bit 1bit 0
State
on reset
Port G data (PORTG)
$007E
PG7
PG6
PG5
PG4
PG3
PG2
PG1
PG0
undefined
Address bit 7bit 6
bit 5bit 4bit 3bit 2bit 1bit 0
State
on reset
Data direction G (DDRG)
$007F DDG7 DDG6 DDG5 DDG4 DDG3 DDG2 DDG1 DDG0 0000 0000
Pin
Alternate
function
PH0
PW1
PH1
PW2
PH2
PW3
PH3
PW4
PH4
RXD2
PH5
TXD2
PH6
RXD3
PH7
TXD3
for more information.
for more information.