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    參數(shù)資料
    

    


    


    
型號(hào)：
MC68HC711EA9VFN3

    

    
廠商：
FREESCALE SEMICONDUCTOR INC

    

    
元件分類：
微控制器/微處理器

    

    
英文描述：
8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PQCC52

    

    
封裝：
PLASTIC, LCC-52

    

    
文件頁數(shù)：
10/58頁

    

    
文件大?。?/td>
583K

    

    
代理商：
MC68HC711EA9VFN3


    

    

    

	
    
    
    

    
    
	
    MOTOROLA
    MC68HC11EA9
    18
    MC68HC11EA9TS/D
    ERASE — Erase/Normal Control for EEPROM
    Refer to 4.10 EEPROM.
    EELAT — EEPROM Latch Control
    0 = EEPROM address and data bus configured for normal reads
    1 = EEPROM address and data bus configured for programming or erasing
    PGM — EPROM/OTPROM/EEPROM Programming Voltage Enable
    0 = Programming voltage to EPROM/OTPROM/EEPROM array disconnected
    1 = Programming voltage to EPROM/OTPROM/EEPROM array connected
    PGM can be read any time and can only be written when ELAT = 1 (for EPROM/OTPROM program-
    ming) or when EELAT = 1 (for EEPROM programming).
    4.10 EEPROM
    MC68HC(7)11EA9 MCUs contain 512 bytes of EEPROM. The 512-byte EEPROM is initially located at
    $B600 after reset, assuming EEPROM is enabled in the memory map by the EEON bit in the CONFIG
    register. EEPROM can be placed at any 4 Kbyte boundary ($x600) by writing appropriate values to the
    INIT register. Note that EEPROM can be mapped such that it contains the vector space. See Figure 6.
    4.10.1 Programming and Erasing EEPROM
    Programming and erasing the EEPROM is controlled by the PPROG register, and is dependent upon
    the block protect (BPROT) register value. The erased state of an EEPROM bit is one. During a read
    operation, bit lines are precharged to one. The floating gate devices of programmed bits conduct and
    pull the bit lines to zero. Unprogrammed bits remain at the precharged level and are read as ones. Pro-
    gramming a bit to one causes no change. Programming a bit to zero changes the bit so that subsequent
    reads return zero.
    When appropriate bits in the BPROT register are cleared, the PPROG register controls programming
    and erasing of the EEPROM. The PPROG register can be read or written at any time, but logic enforces
    defined programming and erasing sequences to prevent unintentional changes to data in EEPROM.
    When the EELAT bit in the PPROG register is cleared, the EEPROM can be read as if it were a ROM.
    The on-chip charge pump that generates the EEPROM programming voltage from VDD uses MOS ca-
    pacitors, which are relatively small in value. The efficiency of this charge pump and its drive capability
    are affected by the level of VDD and the frequency of the driving clock. The clock source driving the
    charge pump is software selectable. When the clock select (CSEL) bit in the OPTION register is zero,
    the E clock is used; when CSEL is one, an on-chip resistor-capacitor (RC) oscillator is used. The RC
    oscillator should be used when E < 1 MHz. This RC oscillator will drive the A/D circuitry as well as the
    EEPROM charge pump when CSEL = 1.
    The EEPROM programming voltage connection to the EEPROM array is not enabled until there has
    been a write to PPROG with EELAT set and PGM cleared. This must be followed by a write to a valid
    EEPROM location or to the CONFIG address, and then a write to PPROG with both EELAT and PGM
    set. Any attempt to set both EELAT and PGM during the same write operation results in neither bit being
    set.
    The erased state of an EEPROM byte is $FF (all ones).
    To erase the EEPROM, ensure that the proper bits of the BPROT register are cleared, then complete
    the following steps using the PPROG register:
    1.
    Set the ERASE, EELAT, and appropriate BYTE and ROW bits in PPROG register.
    2.
    Write to the appropriate EEPROM address with any data. Row erase only requires a write to
    any location in the row. Bulk erase is done by writing to any location in the array.
    3.
    Set the ERASE, EELAT, EEPGM, and appropriate BYTE and ROW bits in PPROG register.
    F
    re
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    to
    r,
    I
    Freescale Semiconductor, Inc.
    For More Information On This Product,
    Go to: www.freescale.com
    n
    c
    ..
    .
    
    
    
    
    
    


    


    

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MC68HC11EA9MFN3
8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQCC52

    

    
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    相關(guān)代理商/技術(shù)參數(shù)
    		

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MC68HC711K4CFN4
功能描述:IC MCU 24K OTP 4MHZ 84-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲(chǔ)器容量:40KB（20K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323

    

    
MC68HC711K4CFNE3
 制造商:Freescale Semiconductor 功能描述:

    

    
MC68HC711K4CFNE4
 制造商:Freescale Semiconductor 功能描述:

    

    
MC68HC711K4CFU4
功能描述:IC MCU 24K 4MHZ EEPROM 80-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND

    

    
MC68HC711KS2CPU4
 制造商:Motorola Inc 功能描述:

    

    
    
    
    
	
    	
    
    
     
     
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