參數(shù)資料
型號： MC68HC705SR3CP
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 64/96頁
文件大小： 3045K
代理商： MC68HC705SR3CP
MC68HC05SR3
Freescale
8-13
CPU CORE AND INSTRUCTION SET
8
8.3.8
Relative
The relative addressing mode is only used in branch instructions. In relative addressing, the
contents of the 8-bit signed byte (the offset) following the opcode are added to the PC if, and only
if, the branch conditions are true. Otherwise, control proceeds to the next instruction. The span of
relative addressing is from –126 to +129 from the opcode address. The programmer need not
calculate the offset when using the Freescale assembler, since it calculates the proper offset and
checks to see that it is within the span of the branch.
EA = PC+2+(PC+1); PC
← EA if branch taken;
otherwise EA = PC
← PC+2
8.3.9
Bit set/clear
In the bit set/clear addressing mode, the bit to be set or cleared is part of the opcode. The byte
following the opcode specifies the address of the byte in which the specified bit is to be set or
cleared. Any read/write bit in the first 256 locations of memory, including I/O, can be selectively set
or cleared with a single two-byte instruction.
EA = (PC+1); PC
← PC+2
Address bus high
← 0; Address bus low ← (PC+1)
8.3.10
Bit test and branch
The bit test and branch addressing mode is a combination of direct addressing and relative
addressing. The bit to be tested and its condition (set or clear) is included in the opcode. The
address of the byte to be tested is in the single byte immediately following the opcode byte (EA1).
The signed relative 8-bit offset in the third byte (EA2) is added to the PC if the specified bit is set
or cleared in the specified memory location. This single three-byte instruction allows the program
to branch based on the condition of any readable bit in the first 256 locations of memory. The span
of branch is from –125 to +130 from the opcode address. The state of the tested bit is also
transferred to the carry bit of the condition code register.
EA1 = (PC+1); PC
← PC+2
Address bus high
← 0; Address bus low ← (PC+1)
EA2 = PC+3+(PC+2); PC
← EA2 if branch taken;
otherwise PC
← PC+3
TPG
65
05SR3.Book Page 13 Thursday, August 4, 2005 1:08 PM
相關(guān)PDF資料
PDF描述
MC68HC705SR3CFB 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP44
MC68HC705SR3CB 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP42
MC68HC05SR3CB 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP42
MC68HC05SR3CP 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40
MC68HC705SR3B 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP42
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC705SR3CPE 功能描述:8位微控制器 -MCU 8B MCU 192 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC705SR3CPE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
MC68HC705SR3PE 功能描述:IC MCU 3.75K 2.1MHZ OTP 40-DIP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 標(biāo)準(zhǔn)包裝:1 系列:AVR® ATmega 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（16K x 16） 程序存儲器類型:閃存 EEPROM 大小:1K x 8 RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:44-TQFP 包裝:剪切帶 (CT) 其它名稱:ATMEGA324P-B15AZCT
MC68HC706P6ACDW 制造商:Motorola Inc 功能描述:
MC68HC708MP16CFU 制造商:MAJOR 功能描述:
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