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參數(shù)資料
| 型號： | MC68HC705RC17P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2.097 MHz, MICROCONTROLLER, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 90/126頁 |
| 文件大?。?/td> | 551K |
| 代理商： | MC68HC705RC17P |
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NON-DISCLOSURE
AGREEMENT
REQUIRED
Carrier Modulator Transmitter (CMT)
General Release Specification
MC68HC705RC17 — Rev. 2.0
66
Carrier Modulator Transmitter (CMT)
MOTOROLA
minimal CPU intervention. When disabled, certain CMT registers can be
used to change the state of the infrared out pin (IRO) directly. This
feature allows for the generation of future protocols not readily
producible by the current architecture.
9.3 Overview
The module consists of carrier generator, modulator, and transmitter
output blocks. The block diagram is shown in Figure 9-1.
The carrier generator has a resolution of 500 ns with a 2-MHz oscillator.
The user may independently define the high and low times of the carrier
signal to determine both period and duty cycle. The carrier generator can
generate signals with periods between 1
s (1 MHz) and 64 s (15.6
kHz) in steps of 500 ns. The possible duty cycle options will depend
upon the number of counts required to complete the carrier period. For
example, a 400-kHz signal has a period of 2.5
s and will therefore
require 5 x 500 ns counts to generate. These counts may be split
between high and low times so the duty cycles available will be 20% (one
high, four low), 40% (two high, three low), 60% (three high, two low) and
80% (four high, one low). For lower frequency signals with larger
periods, higher resolution (as a percentage of the total period) duty
cycles are possible. The carrier generator may select between two sets
of high and low times. When operating in normal mode (subsequently
referred to as time mode), just one set will be used. When operating in
FSK (frequency shift key) mode, the generator will toggle between the
two sets when instructed to do so by the modulator, allowing the user to
dynamically switch between two carrier frequencies without CPU
intervention. When the BASE bit in the modulator control and status
register (MCSR) is set, the carrier output to the modulator is held high
continuously to allow for the generation of baseband protocols. See 9.4
The modulator provides a simple method to control protocol timing. The
modulator has a resolution of 4
s with a 2-MHz oscillator. It can count
system clocks to provide real-time control or it can count carrier clocks
for self-clocked protocols. It can either gate the carrier onto the
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