參數(shù)資料
型號： MC68HC705P9DW
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 98/160頁
文件大小： 2208K
代理商： MC68HC705P9DW
Memory
Technical Data
MC68HC705P9 — Rev. 4.0
42
Memory
MOTOROLA
3.7 Mask Option Register
The mask option register (MOR) is an EPROM/OTPROM byte that is
programmable only with the bootloader function. The MOR controls:
LSB first or MSB first SIOP data transfer
Edge-triggered or edge- and level-triggered external interrupt pin
Enabled or disabled COP watchdog
To program the MOR, use the 5-step procedure given in 3.6.1.1 EPROM
Programming Register. Write to address $0900 in step 3.
SIOP — Serial I/O Port
The SIOP bit controls the shift direction into and out of the SIOP shift
register.
1 = SIOP data transferred LSB first (bit 0 first)
0 = SIOP data transferred MSB first (bit 7 first)
IRQ — Interrupt Request
The IRQ bit makes the external interrupt function of the IRQ/VPP pin
level-triggered as well as edge-triggered.
1 = IRQ/VPP pin negative-edge triggered and low-level triggered
0 = IRQ/VPP pin negative-edge triggered only
COPE — COP Enable
COPE enables the COP watchdog. In applications that have wait
cycles longer than the COP watchdog timeout period, the COP
watchdog can be disabled by not programming the COPE bit to logic
one.
1 = COP watchdog enabled
0 = COP watchdog disabled
$0900
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
SIOP
IRQ
COPE
Write:
Reset:
Unaffected by reset
Erased:
00
= Unimplemented
Figure 3-5. Mask Option Register (MOR)
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For More Information On This Product,
Go to: www.freescale.com
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相關PDF資料
PDF描述
MC68HC705P9MS 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, CDIP28
MC68HC705P9CDW 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705P9VS 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, CDIP28
MC68HC705P9S 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, CDIP28
MC68HC705P9VDW 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
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