參數(shù)資料
型號(hào)： MC68HC705P9CDWR2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 89/156頁
文件大小： 957K
代理商： MC68HC705P9CDWR2
CPU
CPU Registers
38
CPU
MOTOROLA
The 10 most significant bits of the stack pointer are permanently fixed at
0000000011, so the stack pointer produces addresses from $00C0 to
$00FF. If subroutines and interrupts use more than 64 stack locations,
the stack pointer wraps around to address $00FF and begins writing
over the previously stored data. A subroutine uses two stack locations;
an interrupt uses five locations.
Program Counter
The program counter is a 16-bit register that contains the address of the
next instruction or operand to be fetched. The three most significant bits
of the program counter are ignored internally and appear as 000.
Normally, the address in the program counter automatically increments
to the next sequential memory location every time an instruction or
operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential
location.
Condition Code
Register
The condition code register is an 8-bit register whose three most
significant bits are permanently fixed at 111. The condition code register
contains the interrupt mask and four flags that indicate the results of the
instruction just executed.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Bit
0
Read:
Write:
Reset:
0
Loaded with vector from $1FFE and $1FFF
Figure 5. Program Counter (PC)
Bit 7
654321
Bit 0
Read:
1
HIN
Z
C
Write:
Reset:
1
1U1U
U
= Unimplemented
U = Unaffected
Figure 6. Condition Code Register (CCR)
6-hc05cpu
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