參數(shù)資料
型號(hào)： MC68HC705JB4P
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 115/134頁
文件大小： 1305K
代理商： MC68HC705JB4P
February 24, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05JB4
UNIVERSAL SERIAL BUS MODULE
MOTOROLA
REV 2
10-15
When transmitting, the control logic handles parallel to serial conversion, CRC
generation, NRZI encoding, and bit stufng.
When Receiving, the control logic handles Sync detection, packet identication,
end of packet detection, bit (un)stufng, NRZI decoding, CRC validation, and
serial to parallel conversion. Errors detected by the control logic include bad CRC,
time-out while waiting for EOP, and bit stufng violations.
10.4.4.1 Data Encoding/Decoding
The USB employs NRZI data encoding when transmitting packets. In NRZI
encoding, a 1 is represented by no change in level and a 0 is represented by a
change in level. Figure 10-16 shows a data stream and the NRZI equivalent and
Figure 10-17 is a ow diagram for NRZI. The high level represents the J state on
the data lines in this and subsequent gures showing NRZI encoding. A string of
zeros causes the NRZI data to toggle each bit time. A string of ones causes long
periods with no transitions in the data.
Figure 10-16. NRZI Data Encoding
Figure 10-17. Flow Diagram for NRZI
IDLE
DATA
IDLE
NRZI
0110
0
000
00
0
11
1
POWER UP
NO PACKET
TRANSMISSION
IDLE
BEGIN PACKET
FETCH THE
DATA BIT
NO
YES
NO DATA
TRANSITION
IS PACKAGE
TRANSFER
DONE?
NO
YES
DATA
TRANSMISSION
IS DATA
BIT = 0?
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