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參數(shù)資料
| 型號： | MC68HC705J5ACP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 39/113頁 |
| 文件大?。?/td> | 1212K |
| 代理商： | MC68HC705J5ACP |
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July 16, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05J5A
INTERRUPTS
MOTOROLA
REV 2.1
4-5
4.5.1 IRQ CONTROL/STATUS REGISTER (ICSR) $0A
The IRQ interrupt function is controlled by the ICSR located at $000A. All unused
bits in the ICSR will read as logic zeros. The IRQF, IRQF1, IRQE1 bits are cleared
and IRQE bit is set by reset.
Figure 4-3. IRQ Status & Control Register
IRQR 1 - PA7 Interrupt Acknowledge
The IRQR1 acknowledge bit clears an IRQ interrupt triggered by a falling edge
on PA7 by clearing the IRQ1 latch. The IRQR1 acknowledge bit will always read
as a logic zero.
1 =
Writing a logic one to the IRQR1 acknowledge bit will clear the IRQ1
latch.
0 =
Writing a logic zero to the IRQR1 acknowledge bit will have no effect
on the IRQ1 latch.
IRQR - IRQ Interrupt Acknowledge
The IRQR acknowledge bit clears an IRQ interrupt by clearing the IRQ latch.
The IRQR acknowledge bit will always read as a logic zero.
1 =
Writing a logic one to the IRQR acknowledge bit will clear the IRQ
latch.
0 =
Writing a logic zero to the IRQR acknowledge bit will have no effect
on the IRQ latch.
IRQF1 - PA7 Interrupt Request Flag
Writing to the IRQF1 ag bit will have no effect on it. If the additional setting of
IRQF1 ag bit is not cleared in the IRQ service routine and the IRQE1 enable
bit remains set the CPU will re-enter the IRQ interrupt sequence continuously
until either the IRQF1 ag bit or the IRQE1 enable bit is cleared. The IRQF1
latch is cleared by reset.
1 =
Indicates that an IRQ request triggered by a falling edge on PA7 is
pending.
0 =
Indicates that no IRQ request triggered by a falling edge on PA7 is
pending. The IRQF1 ag bit can ONLY be cleared by writing a logic
one to the IRQR1 acknowledge bit. Doing so before exiting the
service routine will mask out additional occurrences of the IRQF1.
0
IRQR1
ICSR
$000A
1
7
W
R
0000000
reset
6543210
IRQE
IRQF
0
IRQR
0
IRQF1
IRQE1
0
RESERVED FOR TEST
R
UNIMPLEMENTED
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參數(shù)描述 |
|---|---|
| MC68HC705JB4DW | 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
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| MC68HC705JP7CDW | 功能描述:IC MCU 8BIT 28-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標準包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| MC68HC705JP7CP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HC705K1CDW | 制造商:Motorola Inc 功能描述: |
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