參數(shù)資料
型號(hào): MC68HC705J2P
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS MICROCONTROLLER UNIT
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20
封裝: PLASTIC, DIP-20
文件頁(yè)數(shù): 63/82頁(yè)
文件大?。?/td> 327K
代理商: MC68HC705J2P
MC68HC705J2
Rev. 2
INSTRUCTION SET
MOTOROLA
10-11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
INC opr
INCA
INCX
INC oprX
INC ,X
JMP opr
JMP opr
JMP oprX
JMP oprX
JMP ,X
JSR opr
JSR opr
JSR oprX
JSR oprX
JSR ,X
LDA #opr
LDA opr
LDA opr
LDA oprX
LDA oprX
LDA ,X
LDX #opr
LDX opr
LDX opr
LDX oprX
LDX oprX
LDX ,X
LSL opr
LSLA
LSLX
LSL oprX
LSL ,X
LSR opr
LSRA
LSRX
LSR oprX
LSR ,X
MUL
NEG opr
NEGA
NEGX
NEG oprX
NEG ,X
NOP
Increment Byte
M
(M) + 1
A
(A) + 1
X
(X) + 1
M
(M) + 1
M
(M) + 1
— —
¤
¤
DIR
INH
INH
IX1
IX
3C
4C
5C
6C
7C
dd
ff
5
3
3
6
5
Unconditional Jump
PC
Jump Address
— — — — —
DIR
EXT
IX2
IX1
IX
BC
CC
DC
EC
FC
dd
hh ll
ee ff
ff
2
3
4
3
2
Jump to Subroutine
PC
(PC) + n (n = 1, 2, or 3)
Push (PCL); SP
(SP) – 1
Push (PCH); SP
(SP) – 1
PC
Conditional Address
— — — — —
DIR
EXT
IX2
IX1
IX
BD
CD
DD
ED
FD
dd
hh ll
ee ff
ff
5
6
7
6
5
Load Accumulator
with Memory Byte
A
(M)
— —
¤
¤
IMM
DIR
EXT
IX2
IX1
IX
A6
B6
C6
D6
E6
F6
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
Load Index Register
with Memory Byte
X
(M)
— —
¤
¤
IMM
DIR
EXT
IX2
IX1
IX
AE
BE
CE
DE
EE
FE
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
Logical Shift Left
(Same as ASL)
— —
¤
¤
¤
DIR
INH
INH
IX1
IX
38
48
58
68
78
dd
ff
5
3
3
6
5
Logical Shift Right
— — 0
¤
¤
DIR
INH
INH
IX1
IX
34
44
54
64
74
dd
ff
5
3
3
6
5
Unsigned Multiply
X : A
(X)
×
(A)
0 — — — 0
INH
42
11
Negate Byte
(Two’s Complement)
M
–(M) = $00 – (M)
A
–(A) = $00 – (A)
X
–(X) = $00 – (X)
M
–(M) = $00 – (M)
M
–(M) = $00 – (M)
— —
¤
¤
¤
DIR
INH
INH
IX1
IX
30
40
50
60
70
ii
ff
5
3
3
6
5
No Operation
— — — — —
INH
9D
2
Table 10-6. Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
H I N Z C
C
b0
b7
0
b0
b7
C
0
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