參數(shù)資料
型號: MC68HC705J1AVS
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Microcontrollers
中文描述: 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER, CDIP20
封裝: WINDOWED, CERDIP-20
文件頁數(shù): 74/108頁
文件大?。?/td> 718K
代理商: MC68HC705J1AVS
Resets and Interrupts
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
74
Freescale Semiconductor
Figure 8-4. External Interrupt Logic
Figure 8-5. External Interrupt Timing
Table 8-2. External Interrupt Timing (V
DD
= 5.0 Vdc)
(1)
1. V
DD
= 5.0 Vdc
±
10%, V
SS
= 0 Vdc, T
A
= –40
°
C to +85
°
C, unless otherwise noted.
2. The minimum t
ILIL
should not be less than the number of interrupt service routine cycles plus 19 t
cyc
.
Characteristic
Symbol
Min
Max
Unit
Interrupt Pulse Width Low (Edge-Triggered)
t
ILIH
125
ns
Interrupt Pulse Period
t
ILIL
Note
(2)
t
cyc
Table 8-3. External Interrupt Timing (V
DD
= 3.3 Vdc)
(1)
1. V
DD
= 3.3 Vdc
±
10%, V
SS
= 0 Vdc, T
A
= –40
°
C to +85
°
C unless otherwise noted.
2. The minimum t
ILIL
should not be less than the number of interrupt service routine cycles plus 19 t
cyc
.
Characteristic
Symbol
Min
Max
Unit
Interrupt Pulse Width Low (Edge-Triggered)
t
ILIH
250
ns
Interrupt Pulse Period
t
ILIL
Note
(2)
t
cyc
PIRQ
(MOR)
LEVEL-SENSITIVE TRIGGER
(MOR LEVEL BIT)
PA3
PA2
PA1
PA0
IRQ
V
DD
RESET
IRQ VECTOR FETCH
EXTERNAL
INTERRUPT
REQUEST
TO BIH & BIL
INSTRUCTION
PROCESSING
IRQF
IRQR
IRQE
D
Q
CK
IRQ
LATCH
CLR
IRQ
t
ILIH
t
ILIL
t
ILIH
EXT INT PIN
EXT INT PIN
1
.
.
EXT INT PIN
n
(INTERNAL)
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