參數(shù)資料
型號: MC68HC705J1ADWR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 136/162頁
文件大?。?/td> 1517K
代理商: MC68HC705J1ADWR2
Resets and Interrupts
Interrupts
MC68HC705J1A — Rev. 3.0
Technical Data
MOTOROLA
Resets and Interrupts
75
Figure 4-6. Interrupt Stacking Order
Table 4-4. Reset/Interrupt Vector Addresses
Function
Source
Local
Mask
Global
Mask
Priority
(1 = Highest)
Vector
Address
Reset
Power-on
RESET pin
COP
watchdog(1)
illegal address
1. The COP watchdog is programmable in the mask option register.
None
1
$07FE–$07FF
Software
interrupt
(SWI)
User code
None
Same priority
as instruction
$07FC–$07FD
External
interrupt
IRQ/VPP pin
IRQE
I bit
2
$07FA–$07FB
Timer
interrupts
RTIF bit
TOF bit
RTIE bit
TOIE bit
I bit
3
$07F8–$07F9
CONDITION CODE REGISTER
$00C0 (BOTTOM OF STACK)
$00C1
$00C2
ACCUMULATOR
INDEX REGISTER
PROGRAM COUNTER (HIGH BYTE)
PROGRAM COUNTER (LOW BYTE)
$00FD
$00FE
$00FF (TOP OF STACK)
1
2
3
4
5
4
3
2
1
UNSTACKING
ORDER
STACKING
ORDER
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