參數(shù)資料
型號： MC68HC705J1Ac
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Microcontrollers
中文描述： 微控制器
文件頁數(shù)： 99/162頁
文件大?。?/td> 1085K
代理商： MC68HC705J1AC
Computer Operating Properly (COP) Module
Interrupts
MC68HC705J1A — Rev. 4.0
Technical Data
Computer Operating Properly (COP) Module
For More Information On This Product,
Go to: www.freescale.com
Clearing the COP bit disables the COP watchdog timer regardless of the
IRQ/V
PP
pin voltage.
If the main program executes within the COP timeout period, the clearing
routine should be executed only once. If the main program takes longer
than the COP timeout period, the clearing routine must be executed
more than once.
NOTE:
Place the clearing routine in the main program and not in an interrupt
routine. Clearing the COP watchdog in an interrupt routine might prevent
COP watchdog timeouts even though the main program is not operating
properly.
7.4 Interrupts
The COP watchdog does not generate interrupts.
7.5 COP Register
The COP register (COPR) is a write-only register that returns the
contents of EPROM location $07F0 when read.
COPC — COP Clear Bit
This write-only bit resets the COP watchdog. Reading address $07F0
returns undefined results.
Address:
$07F0
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
COPC
Reset:
0
= Unimplemented
Figure 7-1. COP Register (COPR)
F
Freescale Semiconductor, Inc.
n
.
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