參數(shù)資料
型號(hào)： MC68HC705E6VFB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 109/140頁
文件大?。?/td> 1584K
代理商： MC68HC705E6VFB
A-to-D Converter
MC68HC05E6 — Rev. 1.0
A-to-D Converter
CH2–CH0 — A/D channel selection
The CH2–CH0 bits allow the user to determine which channel of the
A/D converter multiplexer is selected (see Table 10).
A/D result data
register (ADDATA)
ADDATA is a read-only register which is used to store the result of an
A/D conversion. The result is loaded into the register from the SAR and
the conversion complete flag (COCO) in the ADSTAT register is set.
NOTE:
Performing a digital read of port G with levels other than VDD or VSS on
the pins will result in greater power dissipation during the read cycles.
A/D converter during WAIT mode
The A/D converter continues to operate normally during WAIT mode. To
decrease power consumption during WAIT, it is recommended that both
the ADON and ADRC bits in the ADSTAT register are cleared, if the A/D
converter is not being used. If the A/D converter is being used and the
system clock frequency is above 1MHz, the ADRC bit should be cleared
to disable the internal RC oscillator.
Table 10 A/D channel assignment
CH2
CH1
CH0
Channel
Signal
0
AD0/PG0
0
1
AD1/PG1
0
1
0
2
AD2/PG2
0
1
3
AD3/PG3
100
4
VRH
101
5
(VRH+VRL)/2
110
6
VRL
1
7
Factory test
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
A/D data (ADDATA)
$0010
Undened
6-adc
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料
PDF描述
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MC68HC05E6MFB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC705G1B 制造商:Rochester Electronics LLC 功能描述:- Bulk
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