參數(shù)資料
型號: MC68HC705E6CFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 82/140頁
文件大?。?/td> 1141K
代理商: MC68HC705E6CFB
Core Timer
MC68HC05E6 — Rev. 1.0
46
Core Timer
MOTOROLA
CTOF (core timer overflow flag) is a read-only status bit which is set
when the 8-bit ripple counter rolls over from $FF to $00. A CPU interrupt
request will be generated if CTOFE is set. Clearing CTOF is done by
writing a ‘1’ to the RCTOF bit (bit 3) in the CTCSR. Reset clears CTOF.
When CTOFE (core timer overflow enable) is set, a CPU interrupt
request is generated when the CTOF bit is set. Reset clears CTOFE.
The core timer counter register (CTCR) is a read-only register that
contains the current value of the 8-bit ripple counter at the beginning of
the timer chain. This counter is clocked at f
OP/4 and can be used for
various functions including a software input capture. Extended time
Figure 10 Core timer block diagram
CTOF RTIF CTOFE RTIE RCTOF RRTIF RT1
RT0
COP watchdog
timer
(
÷ 8 )
To
reset
logic
Overflow
detect
circuit
(
÷ 4 )
To interrupt logic
Interrupt circuit
RTI select circuit
$09 CTCR
(Core timer counter)
$08 CTCSR
(Core timer control & status)
COP
clear
Internal processor clock
7-bit counter
fOP
fOP / 2
2
fOP / 2
10
fOP / 2
14
fOP / 2
17
Internal bus
8
2-ctimer
相關PDF資料
PDF描述
MC68HC705E6VDWR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC05E6VFB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
MC68HC705E6VDW 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705E6VDWR3 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705E6MDWR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
相關代理商/技術參數(shù)
參數(shù)描述
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